Arria V Hard Processor System Technical Reference Manual

ID 683011
Date 12/02/2022
Public
Document Table of Contents

10.4. ACP ID Mapper

The ACP ID mapper is situated between the level 3 (L3) interconnect and the MPU subsystem ACP slave. It is responsible for mapping 12‑bit Advanced Microcontroller Bus Architecture ( AMBA* ) Advanced eXtensible Interface ( AXI* ) IDs (input IDs) from the system interconnect to 3‑bit AXI* IDs (output IDs) supported by the ACP slave port.

The ACP ID mapper also implements a 1 GB coherent window into the 4 GB Arm* Cortex®-A9 MPCore* address space.