Altera® Quartus® Prime Standard Edition Settings File Reference Manual

ID 683084
Date 5/08/2017
Public
Document Table of Contents

1.10.264. PLL_FORCE_OUTPUT_COUNTER

Forces which counter to use for a particular PLL clock output. By default the compiler will automatically determine the best counter to use based on clock usage and other routing conflicts, but can be overridden with this option. Using this option can cause clock routing problems, as the clock router cannot rotate counters to resolve conflicts. Also see option PRESERVE_PLL_COUNTER_ORDER.

Type

Enumeration

Values

  • C0
  • C1
  • C2
  • C3
  • C4
  • C5
  • C6
  • C7
  • C8
  • C9

Device Support

  • Arria GX
  • Arria II GX
  • Arria II GZ
  • Cyclone 10 LP
  • Cyclone II
  • Cyclone III
  • Cyclone III LS
  • Cyclone IV E
  • Cyclone IV GX
  • HardCopy II
  • HardCopy III
  • HardCopy IV
  • MAX 10
  • Stratix II
  • Stratix II GX
  • Stratix III
  • Stratix IV

Notes

This assignment supports Fitter wildcards.

Syntax


		set_instance_assignment -name PLL_FORCE_OUTPUT_COUNTER -to <to> -entity <entity name> <value>