Altera® Quartus® Prime Standard Edition Settings File Reference Manual

ID 683084
Date 5/08/2017
Public
Document Table of Contents

1.7.3. ACLK_RULE_NO_SZER_ACLK_DOMAIN

Direct Design Assistant to detect synchronizer between asynchronous clock domains on the design.

Type

Boolean

Device Support

  • Cyclone
  • E
  • MAX II
  • MAX V
  • Mercury
  • Stratix
  • Stratix GX

Notes

None

Syntax


		set_global_assignment -name ACLK_RULE_NO_SZER_ACLK_DOMAIN <value>