AN 825: Partially Reconfiguring a Design: on Intel® Stratix® 10 GX FPGA Development Board

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ID 683880
Date 12/07/2020
Public
Document Table of Contents
Document Table of Contents x
Partially Reconfiguring a Design on Intel® Stratix® 10 GX FPGA Development Board
Partially Reconfiguring a Design on Intel® Stratix® 10 GX FPGA Development Board x
Reference Design Requirements Reference Design Overview Reference Design Files Reference Design Walkthrough Document Revision History for AN 825: Partially Reconfiguring a Design on Intel® Stratix® 10 GX FPGA Development Board
Reference Design Walkthrough x
Step 1: Getting Started Step 2: Creating a Design Partition Step 3: Allocating Placement and Routing Region for a PR Partition Step 4: Defining Personas Step 5: Creating Revisions Step 6: Compiling the Base Revision Step 7: Preparing PR Implementation Revisions Step 8: Programming the Board Modifying an Existing Persona Adding a New Persona to the Design
Step 5: Creating Revisions x
Setting the Base Revision Type Creating Implementation Revisions
Step 8: Programming the Board x
Troubleshooting PR Programming Errors
Partially Reconfiguring a Design on Intel® Stratix® 10 GX FPGA Development Board

Document Revision History for AN 825: Partially Reconfiguring a Design on Intel® Stratix® 10 GX FPGA Development Board

Document Version Intel® Quartus® Prime Version Changes
2020.12.07 20.3
  • Updated Intel® Quartus® Prime software version number in "Reference Design Requirements" topic.
  • Updated figures in "Creating Implementation Revisions" topic.
  • Corrected typo in "Step 7: Preparing PR Implementation Revisions" topic.
2019.08.06 19.1
  • Corrected error in "Exporting Post Final Snapshot in Design Partitions Window" figure.
2019.07.15 19.1
  • Changed default file export location from output_files to project directory.
  • Described new reserved core partition type and related GUI.
  • Updated Design Partition Window descriptions and screenshots for column display button and new partition properties.
2018.09.24 18.1
  • Updated sections - Step 2: Creating a Design Partition, Step 6: Compiling the Base Revision, and Step 7: Preparing PR Implementation Revisions with the new PR flow that eliminates the need for manual export of finalized snapshot of the static region.
  • Other minor text edits and image updates.
2018.05.07 18.0
  • Compilation flow change
  • Other minor text edits

2017.11.06

17.1

Initial release of the document.
Level Two Title