Battery Management System Reference Design

ID 683279
Date 4/02/2016
Public
Document Table of Contents

1.4. BMS Reference Design FPGA Resource Usage

Use the resource usage to estimate the size of your design.
Table 5.  Resource Usage
Component LE M9K DSP
DEKF IP (design C only) 20,610 30 29
Matrix processor (design B only) 6,304 35 24
Nios II processor 2,916 32 6
Nios II floating-point custom instruction core 2,204 3 9
DDR controller 4,785 12 0
Avalon-MM interconnect 5,897 0 0
JTAG-Avalon-MM bridge 799 1 0
Miscellaneous 1,292 23 0
Design A total ~14,000 57 15
Design B total ~24,000 92 39
Design C total ~33,000 84 35
Total ~45,000/50,000 136/182 68