Intel® High Level Synthesis Compiler Standard Edition: Reference Manual

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ID 683310
Date 12/18/2019
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Document Table of Contents
Document Table of Contents x
1. Intel® HLS Compiler Standard Edition Reference Manual 2. Compiler 3. C Language and Library Support 4. Component Interfaces 5. Component Memories (Memory Attributes) 6. Loops in Components 7. Component Concurrency 8. Arbitrary Precision Math Support 9. Component Target Frequency 10. Intel® High Level Synthesis Compiler Standard Edition Compiler Reference Summary A. Supported Math Functions B. Intel® HLS Compiler Standard Edition Reference Manual Archives C. Document Revision History of the Intel® HLS Compiler Standard Edition Reference Manual
2. Compiler x
2.1. Intel® HLS Compiler Standard Edition Command Options 2.2. Using Libraries in Your Component 2.3. Compiler Interoperability 2.4. Intel® HLS Compiler Pipeline Approach
3. C Language and Library Support x
3.1. Supported C and C++ Subset for Component Synthesis 3.2. C and C++ Libraries 3.3. Intel® HLS Compiler Standard Edition Compiler-Defined Preprocessor Macros
4. Component Interfaces x
4.1. Component Invocation Interface 4.2. Avalon® Streaming Interfaces 4.3. Avalon® Memory-Mapped Master Interfaces 4.4. Slave Interfaces 4.5. Component Invocation Interface Arguments 4.6. Unstable and Stable Component Arguments 4.7. Global Variables 4.8. Structs in Component Interfaces 4.9. Reset Behavior
4.1. Component Invocation Interface x
4.1.1. Scalar Parameters 4.1.2. Pointer and Reference Parameters 4.1.3. Interface Definition Example: Component with Both Scalar and Pointer Arguments
4.3. Avalon® Memory-Mapped Master Interfaces x
4.3.1. Memory-Mapped Master Testbench Constructor 4.3.2. Implicit and Explicit Examples of Describing a Memory Interface
4.4. Slave Interfaces x
4.4.1. Control and Status Register (CSR) Slave 4.4.2. Slave Memories
5. Component Memories (Memory Attributes) x
5.1. Static Variables
6. Loops in Components x
6.1. Loop Initiation Interval (ii Pragma) 6.2. Loop-Carried Dependencies (ivdep Pragma) 6.3. Loop Coalescing (loop_coalesce Pragma) 6.4. Loop Concurrency (max_concurrency Pragma) 6.5. Loop Unrolling (unroll Pragma)
7. Component Concurrency x
7.1. Serial Equivalence within a Memory Space or I/O 7.2. Concurrency Control (hls_max_concurrency Attribute)
8. Arbitrary Precision Math Support x
8.1. Declaring ac_int Data Types 8.2. Integer Promotion and ac_int Data Types 8.3. Debugging Your Use of the ac_int Data Type 8.4. Declaring ac_fixed Data Types 8.5. AC Data Types and Native Compilers
8.1. Declaring ac_int Data Types x
8.1.1. Important Usage Information on the ac_int Data Type
10. Intel® High Level Synthesis Compiler Standard Edition Compiler Reference Summary x
10.1. Intel® HLS Compiler Standard Edition i++ Command-Line Arguments 10.2. Intel® HLS Compiler Standard Edition Header Files 10.3. Intel® HLS Compiler Standard Edition Compiler-Defined Preprocessor Macros 10.4. Intel® HLS Compiler Standard Edition Keywords 10.5. Intel® HLS Compiler Standard Edition Simulation API (Testbench Only) 10.6. Intel® HLS Compiler Standard Edition Component Memory Attributes 10.7. Intel® HLS Compiler Standard Edition Loop Pragmas 10.8. Intel® HLS Compiler Standard Edition Component Attributes 10.9. Intel® HLS Compiler Standard Edition Component Default Interfaces 10.10. Intel® HLS Compiler Standard Edition Component Invocation Interface Arguments 10.11. Intel® HLS Compiler Standard Edition Component Macros 10.12. Intel® HLS Compiler Standard Edition Streaming Input Interfaces 10.13. Intel® HLS Compiler Standard Edition Streaming Output Interfaces 10.14. Intel® HLS Compiler Standard Edition Memory-Mapped Interfaces 10.15. Intel® HLS Compiler Standard Edition Arbitrary Precision Data Types
A. Supported Math Functions x
A.1. Math Functions Provided by the math.h Header File A.2. Math Functions Provided by the extendedmath.h Header File A.3. Math Functions Provided by the ac_fixed_math.h Header File
1. Intel® HLS Compiler Standard Edition Reference Manual
2. Compiler
3. C Language and Library Support
4. Component Interfaces
5. Component Memories (Memory Attributes)
6. Loops in Components
7. Component Concurrency
8. Arbitrary Precision Math Support
9. Component Target Frequency
10. Intel® High Level Synthesis Compiler Standard Edition Compiler Reference Summary
A. Supported Math Functions
B. Intel® HLS Compiler Standard Edition Reference Manual Archives
C. Document Revision History of the Intel® HLS Compiler Standard Edition Reference Manual

C. Document Revision History of the Intel® HLS Compiler Standard Edition Reference Manual

Document Version Intel® HLS Compiler Standard Edition Version Changes
2019.12.18 19.1

Document Revision History for Intel® HLS Compiler Reference Manual

Previous versions of the Intel® HLS Compiler Reference Manual contained information for both Intel® HLS Compiler Standard Edition and Intel® HLS Compiler Pro Edition.

Document Version Intel® Quartus® Prime Version Changes
2019.09.30 19.3
2019.09.10 19.2
2019.07.01 19.2
2019.06.04 19.1
2019.05.03 19.1
2019.04.01 19.1
2019.01.03 18.1.1
2018.12.24 18.1.1
  • Removed information about the "HLS/iostream" header file. The function provided by this header file is replaced by using the standard C++ iostream header and the HLS_SYNTHESIS macro.
  • Added description of the HLS_SYNTHESIS macro to C and C++ Libraries.
2018.12.24 18.1
2018.09.24 18.1
  • The Intel® HLS Compiler has a new front end. For a summary of the changes introduced by this new front end, see Improved Intel HLS Compiler Front End in the Intel® HLS Compiler Version 18.1 Release Notes.
  • The --promote-integers flag and the best_practices/integer_promotion tutorial are no longer supported in Pro Edition because integer promotion is now done by default. The flag and tutorial are still supported in Standard Edition.
  • Components invoked with the hls_avalon_slave_component argument must take slave or stable arguments. If the component arguments are not slave or stable arguments, compiling the component generates an error message. The description of the hls_avalon_slave_component argument in Component Invocation Interface Arguments and Quick Reference now reflects that requirement.
  • In Loops in Components, clarified the pragma statements that apply to loops must immediately precede the loop that the pragma applies to.
  • In Declaring ac_int Data Types, added initialization requirement for ac_int variables larger than 64 bits. You must use ac::init_array constructors to initialize ac_int variables larger than 64 bits.
  • In Static Variables, removed the restriction on applying memory attributes to file-scoped static variables. Both file-scoped and function-scoped static variables can have memory attributes applied to them.
2018.07.08 18.0
  • In Static Variables, highlighted paragraph that says that memory attributes applied to static variables work only if the static variable is declared within the component function.
  • In Control and Status Register (CSR) Slave, corrected a typo. The sentence " You do not need to use the hls_avalon_slave_component attribute to use the hls_avalon_slave_component attribute" was corrected to say "You do not need to use the hls_avalon_slave_component attribute to use the hls_avalon_slave_register_argument attribute".
2018.05.07 18.0
  • Starting with Intel® Quartus® Prime Version 18.0, the features and devices supported by the Intel® HLS Compiler depend on what edition of Intel® Quartus® Prime you have. Intel® HLS Compiler publications now use icons to indicate content and features that apply only to a specific edition as follows:
    Indicates that a feature or content applies only to the Intel® HLS Compiler provided with Intel® Quartus® Prime Pro Edition.
    Indicates that a feature or content applies only to the Intel® HLS Compiler provided with Intel® Quartus® Prime Standard Edition.
  • Corrected the code example in Intel® HLS Compiler Streaming Input Interfaces Code Example. The corrected line is int x = a.tryRead(success); (was int x = a.tryRead(&success);).
  • Added ihc::firstSymbolInHighOrderBits and ihc::usesEmpty to the list of stream interface declarations in Streaming Input Interfaces and Quick Reference. Also, revised the description of the ihc::bitsPerSymbol declaration to include the effect of the ihc::firstSymbolInHighOrderBits declaration.
  • Added a footnote to the -march MAX10 option in about a prerequisite required before you synthesize your component IP for Intel® MAX® 10 devices.
2017.12.22 17.1.1
  • Updated hls_avalon_slave_memory_argument(N) description in Slave Memories to include the description that the parameter value N is the size of the memory in bytes.
  • Updated and to indicate that the ac_int debug macros have the following restrictions:
    • You must declare the macros in your code before you declare #include HLS/ac_int.h.
    • The ac_int debugging tools work only for x86 emulation of your component.
2017.11.06 17.1
  • Updated Supported Math Functions as follows:
    • Noted that the HLS/extendedmath.h header file is supported only by the Intel® HLS Compiler, not by the GCC or MSVC compilers.
    • Added popcount to the list functions supported by the HLS/extendedmath.h header file.
    • Expanded list of functions provided by HLS/extendedmath.h to explicitly list double-precision and single-precision floating point versions of the functions.
    • Added a list of popcount function variations available for different data types.
  • Reorganized the overall structure of the book, breaking up chapter 1 into smaller chapters and changing the order of the chapters.
  • Updated mentions of the HLS or i++ installation directory to use the Intel® Quartus® Prime Design Suite installation directory as the starting point.
  • Moved the following content to Intel® High Level Synthesis Compiler Best Practices Guide:
2017.06.23 —
  • Updated Static Variables to add information about static variable initialization and how to control it.
  • Minor changes and corrections.
2017.06.09 —
  • Removed all mentions of --device compiler option. This option has been replaced by the changed function of the -march compiler option. See for details about the changed function of the -march compiler option.
2017.02.03 —
  • In Scalar Parameters and Avalon Streaming Interfaces, updated information in the Available Scalar Parameters for Avalon-ST Interfaces table.
  • In Pointer Parameters, Reference Parameters, and Avalon Memory-Mapped Master Interfaces, updated information in the Available Template Arguments for Configuration of the Avalon-MM Interface table.
  • Added new information to Global Variables about area usage and optimizing for global constants, pointers, and variables.
2016.11.30 —
  • In HLS Compiler Command Options, modified the table Command Options that Customize Compilation in the following manner:
    • Removed the --rtl-only command option and its description because it is no longer in use.
    • Added the --simulator <name> command option and its description.
    • Remove the -g command option because the HLS compiler now generates debug information in reports by default for both Windows and Linux. In addition, debug data is available by default in final binaries for Linux.
  • In Pointer Parameters, Reference Parameters, and Avalon Memory-Mapped Master Interfaces, added information on the altera::align<value> template argument in the table.
  • Added the topics Memory-Mapped Test Bench Constructor and Implicit and Explicit Examples of Creating a Memory-Mapped Master Test Bench.
  • In Usage Examples of Component Invocation Protocol Macros, replaced component invocation protocol attributes in the code examples with their corresponding macros.
  • Added the line #include "HLS/hls.h" to the code snippets in the following sections:
    • Usage Examples of Interface Synthesis Macros
    • Usage Examples of Component Invocation Protocol Macros
  • Added the topic Arbitrary Precision Integer Support to introduce the ac_int datatype and the Intel-provided ac_int.h header file. Included the following subtopics:
    • Defining the ac_int Datatype in Your Component for Arbitrary Precision Integer Support
    • Important Usage Information on the ac_int Datatype
  • Updated the content in Area Minimization and Control of On-Chip Memory Architecture:
    • Replaced the numreadports(n) and numwriteports(n) entries the Attributes for Controlling On-Chip Memory Architecture table with a single numports_readonly_writeonly(m,n) entry.
    • Added information on the hls_simple_dual_port_memory macro.
    • Added information on the hls_merge ("label","direction") and the hls_bankbits(b0, b1, ..., bn) attributes.
  • Added example use cases for the hls_merge("label","direction") and the hls_bankbits(b0, b1, ..., bn) attributes.
  • Added the topic Relationship between hls_bankbits Specifications and Memory Address Bits to explain the derivation of a memory address in the presence of the hls_bankbits and hls_bankwidth attributes.
2016.09.12 — Initial release.
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