Serial Lite III Streaming Stratix® V FPGA IP Design Example User Guide

ID 683335
Date 11/01/2021
Public
Document Table of Contents

1.3. Generating the Design

You can use the Serial Lite III Streaming IP core parameter editor in the Intel® Quartus® Prime software to generate the design example.
Figure 4. Procedure
Figure 5. Example Design Tab
Figure 6. Generation Window