Article ID: 000087179 Content Type: Error Messages Last Reviewed: 06/27/2018

Error (11924): Bank has conflicting VCCIO settings

Environment

  • Intel® Quartus® Prime Pro Edition
  • Intel® Quartus® Prime Standard Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in Intel® Quartus® Prime software version 18.0 and earlier, you will see this error in Intel Arria® 10 devices in the cases where : 

    • 2.5V Input standard is placed in a 3VIO bank with 3.0V I/O standard of which VCCIO is 3.0V
    • 3.0V Input standard is placed in a 3VIO bank with 2.5V I/O standard of which VCCIO is 2.5V
    Resolution

    As long as VIH and VIL specification are satisfied, you can use the following input standard as a workaround:

    • 3.0V input standard instead of 2.5V input standard
    • 2.5V input standard instead of 3.0V input standard

    Refer to  Intel Arria 10 Device Datasheet for VIH and VIL specifications of 3.0V and 2.5V input standards.

    This problem will be fixed in future version of Intel Quartus Prime software.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs