Article ID: 000086939 Content Type: Error Messages Last Reviewed: 05/19/2023

ERROR: iossm_bf_cpu_cpu_test_bench/ihp_read is 'x'

Environment

  • Intel® Quartus® Prime Pro Edition
  • External Memory Interfaces Intel® Stratix® 10 FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    In the Intel® Quartus® Prime Pro Edition Software version 18.1 and later, you may see the following error message when simulating a design containing the Intel® Stratix® 10 HPS EMIF.

    ERROR: iossm_bf_cpu_cpu_test_bench/ihp_read is 'x'

    This error is generated because the simulation of a design containing Intel® Stratix® 10 HPS EMIF is not supported.

    Resolution

    To avoid this error, follow one of the methods below to remove the Intel® Stratix® 10 HPS EMIF from the existing design. 

    Method 1

    1. Make a copy of the existing Quartus project. 
    2. In the Quartus design copy, remove the HPS from the project hierarchy. 
    3. Regenerate the simulation database.

    Method 2

    1. Open the Platform Designer system of the existing Quartus project. 
    2. Select the HPS component in the Platform Designer system. 
    3. Click on the Component Instantiation tab or click View > Component Instantiation.
    4. The current Implementation Type will be set to IP (default). Select Blackbox. 
    5. Regenerate the simulation database. The module will not be generated for that instance. 
    6. When you build the final syntheziable system, ensure that you revert the Implementation Type back to IP.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs