Article ID: 000086437 Content Type: Troubleshooting Last Reviewed: 04/13/2023

Why we see EMAC A setting changing from RMII to RGMII on Pin Mux GUI in Intel Agilexl® 7 FPGA HPS IP?

Environment

  • Intel® Quartus® Prime Pro Edition
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a visual problem in the Intel® Quartus® Prime Pro Edition Software, we might see EMAC A setting change from RMII to RGMII in Intel Agilex® 7 FPGA HPS IP Pin Mux GUI when clicking the other IP in the Platform Designer and back.

    Resolution

    The RMII interface setting is valid, and we can reference the Advanced IP Placement for the RMII interface I/O assignment.

    Related Products

    This article applies to 2 products

    Intel Agilex® 7 FPGAs and SoC FPGAs
    Intel Agilex® 7 FPGAs and SoC FPGAs F-Series

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