Article ID: 000085856 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Can I use the differential HSTL input clock signal to drive internal resources other than a clock on my Stratix® or StratixGX device?

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Description Yes. Although differential HSTL is supported for input clock pins only, it is not restricted to drive the clock port of a DFF once the differential signal has been received by your Stratix or Stratix GX device.

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This article applies to 1 products

Stratix® FPGAs