Article ID: 000079390 Content Type: Troubleshooting Last Reviewed: 09/11/2012

What are the minimum files needed to simulate IP Compiler for PCI Express core?

Environment

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Description The minimum neccessary files during compilation for simulation are:
<variant>.v(hd)
<variant>_serdes.v(hd)
<variant>_core.v(h)o

altera_mf
220model
sgate

and all the simulation model files depending on device:
Stratix® IV GX:
altera_primitives
stratixiv_hssi_atoms
stratixiv_pcie_hip_atoms

Arria® II GX:
arriaii_hssi_atoms
arriaii_pcie_hip_atoms

Cyclone® IV GX:
cycloneiv_hssi_atoms
cyclone_iv_pcie_hip_atoms

Related Products

This article applies to 3 products

Cyclone® IV GX FPGA
Stratix® IV GX FPGA
Arria® II GX FPGA