Article ID: 000078238 Content Type: Error Messages Last Reviewed: 03/13/2019

Error (175001): The Fitter cannot place 1 LVDS_CHANNEL, which is within Altera LVDS SERDES dpa_rx_x1_wo_pll_altera_lvds_170_q4dwfni

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

You may see this error if you implement an Arria® 10 “N” channel DPA LVDS design using a single 1 channel instance stamped multiple times in external pll mode.

Resolution

This configuration of single instances stamped multiple times is not supported using external pll mode. If an 8 channel design is required using external pll mode then a value of 8 channels must be selected in the Altera LVDS SERDES IP.

Related Products

This article applies to 1 products

Intel® Arria® 10 FPGAs and SoC FPGAs