Article ID: 000077171 Content Type: Troubleshooting Last Reviewed: 02/13/2006

What are some benefits of having a phase-locked loop (PLL) with programmable bandwidth, such as those in Stratix™ devices?

Environment

  • PLL
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    Description The advantage of having a PLL with programmable bandwidth is that the designer can set the bandwidth to the appropriate value to balance the need for jitter filtering and lock time.

    A high bandwidth allows the PLL to track jitter, whereas a low bandwidth filters out high-frequency jitter. A high-bandwidth PLL also provides a fast lock time but allows more jitter to flow through. A low-bandwidth PLL, on the other hand, filters out more jitter, but increases lock time.

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    Related Products

    This article applies to 1 products

    Stratix® FPGAs