Article ID: 000076913 Content Type: Error Messages Last Reviewed: 03/09/2023

Error: Simulation initialization failed.

Environment

  • Intel® Quartus® Prime Pro Edition
  • Memory Interfaces and Controllers
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    If the Intel Agilex® 3 FPGA DDR4 intellectual property (IP) simulation design example is generated using the Intel® Quartus® Prime Pro Edition Software version 19.3 or later, you might see the following errors when performing register transfer level (RTL) simulation using the Aldec Riviera-PRO tool.

    Error: Simulation initialization failed.

    Fatal Error: run.do : (4, 1): Script execution terminated due to error(s).

    Resolution

    This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 21.3.

    Related Products

    This article applies to 1 products

    Intel Agilex® 7 FPGAs and SoC FPGAs F-Series