Article ID: 000074257 Content Type: Troubleshooting Last Reviewed: 01/13/2023

Is the PR_READY signal used for backpressure control during Partial Reconfiguration of Intel® Arria® 10 devices?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Partial Reconfiguration Controller Intel® Arria® 10 Cyclone® 10 FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    No, the PR_READY signal is not used for backpressure control during Partial Reconfiguration of Intel® Arria® 10 devices. Once asserted at the start of configuration, PR_READY will only deassert if an error occurs, or when configuration is complete. 

    Resolution

    Do not use PR_READY as an indication of back pressure control.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs