Article ID: 000073978 Content Type: Troubleshooting Last Reviewed: 04/21/2023

Can the HPS/FPGA configuration order be set as HPS first for non-HPS design?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    No. For Intel® Stratix® 10 and Intel Agilex® 7 devices, in designs that do not include HPS, do not set the HPS/FPGA configuration order as HPS first. Otherwise, you will not be able to access QSPI flash using the Mailbox Client Intel® FPGA IP, and you will see error code 0x80 (QSPI_HW_ERROR)  for QSPI_SET_CS operation. For details of the operation command and error codes, refer to the Mailbox Client Intel® FPGA IP User Guide.

     

     

    Resolution

    This problem is fixed starting with the Intel® Quartus® Prime Pro/Standard Edition Software version 22.1.

    Related Products

    This article applies to 2 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs
    Intel Agilex® 7 FPGAs and SoC FPGAs