What’s New in 21.1
Intel® Quartus® Prime Pro Edition Software v21.1 supports the newest FPGA family:
Intel® Agilex™ FPGAs
The Intel® Agilex™ FPGA family leverages heterogeneous 3D system-in-package (SiP) technology to integrate Intel’s first FPGA fabric built on 10 nm SuperFin Technology and 2nd Generation Intel® Hyperflex™ FPGA Architecture to deliver up to 45% higher performance (geomean vs. Intel® Stratix® 10)1 or up to 40% lower power1 for applications in Data Center, Networking, and Edge compute. Intel® Agilex™ SoC FPGAs also integrate the quad-core Arm Cortex-A53 processor to provide high system integration.
The Intel® Quartus® Prime Pro Edition Software v21.1 is an intuitive design environment that will help you meet your power and performance requirements and reduce your overall development effort. Features in the v21.1 release include:
- Improvements for Intel® Agilex™ FPGA power, performance, runtime, memory, and logic utilization
- New and improved Design Assistant design rules for synthesis, clock domain crossing (CDC), reset domain crossing (RDC), and timing
- Hierarchical grouping of design rule checking (DRC)
- Rule-tagging and filtering
- DRC waiver mechanism
- New ease-of-use reports for static timing analysis, design closure, synthesis, and undefined entities
- More cross-probing and runtime improvements for reports
- Locate SDC constraints in a file
- Faster ECO compiles for post-fit tap targets in Signal Tap II Logic Analyzer
- Flow-Resume feature
- Improved GUI display for higher resolution monitors
- Remote debug over Ethernet and PCI Express using Nios® II processor
- Mark signals for debug (Beta) feature for register transfer level (RTL) development
- Questa*-Intel® FPGA Edition Software (Beta Evaluation)
- Updates to IP including
- PCI Express
Free Hands-On Training
Register for FREE instructor-led classes for hands-on training to enhance your FPGA design skills.
- The Intel® Quartus® Prime Software: Foundation
- Using Intel® Stratix® 10 and Intel® Agilex™ SoC FPGAs
- Introduction to the Platform Designer System Integration Tool
- The Quartus Software Debug Tools
- Timing Closure with Intel® Quartus® Prime Pro Software
- Intel® Quartus® Prime Pro Software Timing Analysis
- Using Intel® SoC FPGAs
- Introduction to Verilog HDL
- Advanced Verilog HDL Design Techniques
- And more!
Documentation and Support
Find technical documentation, videos, and training courses for Intel® Quartus® Prime Design Software.
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Product and Performance Information
Performance varies by use, configuration and other factors. Learn more at www.Intel.com.au/PerformanceIndex.
Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available updates. See backup for configuration details. No product or component can be absolutely secure.
Your costs and results may vary.