ALTERA DOES NOT WARRANT THAT THE FUNCTIONS CONTAINED IN THIS PATCH 
WILL MEET YOUR REQUIREMENTS, OR THAT THE OPERATION OF THIS PATCH 
WILL BE UNINTERRUPTED OR ERROR-FREE. 

//**************************************************************** 
quartus-10.1-0.36-readme.txt 
Readme file for Quartus II 10.1 Patch 0.36
Copyright (C) Altera Corporation 2011 All right reserved. 
Patch created on January 14 2011
Patch SPR#: 364389 
SPRs fixed: 364167
//**************************************************************** 

Problem: RXProblem: Quartus II incorrectly allow CDR clock 
         distribution network to be dynamically reconfigured by 
         channel reconfiguration.
         This will cause CDR clock input contention at RX in 
         channel 3 or channel 0 after channel reconfiguration if 
         MPLL adjacent to channel 3 or channel 0 is driving other 
         circuitry.


Solution: ALTGX_RECONFIG has been updated to protect CRAM setting 
          that is related to clock distribution network from being 
          dynamically reconfigured to fix this issue. After install 
          the patch 0.36, ALTGX_RECONFIG MegaFunction design file is 
          required to be regenerated and perform full compilation on 
          the design. Users may continue to use the HEX / MIF file 
          generated prior to the patch 0.36 installation. This 
          problem will be fixed in future Quartus II software 
          version.


Caution - You must either have previously installed the 
          Quartus II 10.1 software or must 
          install the Quartus II 10.1 software 
          before installing this patch. Otherwise, the patch will 
          not be installed correctly and the Quartus II 
          software will not run properly.