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Intel® Platform Innovation Framework for EFI—CSM Spec, Rev. 96

Revision 0.96: high-level design of the Compatibility Support Module code to implement the Intel® Platform Innovation Framework for EFI.

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EFI Human Interface Infrastructure Specification v0.92

Defines core code for an implementation of the Human Interface Infrastructure of the Intel® Platform Innovation Framework for EFI.

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EFI System Management Mode Core Interface Spec (SMM CIS) v0.9

Defines the core code and services required for implementation of the System Management Mode of the Intel® Platform Innovation Framework for EFI.

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EFI Cache Subclass Specification v0.9

Defines core code for an implementation of the cache data hub subclass of the Intel® Platform Innovation Framework for EFI.

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EFI Miscellaneous Subclass Specification v0.9

Defines core code for implementation of the miscellaneous data hub subclass of the Intel® Platform Innovation Framework for EFI.

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EFI Platform IDE Initialization Protocol Specification v0.3

Defines core code and services required of the platform IDE initialization protocol implementation in the Intel® Platform Innovation Framework.

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EFI Processor Subclass Specification v0.9

Defines core code for an implementation of the processor data hub subclass of the Intel® Platform Innovation Framework for EFI.

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EFI SMBus PPI Specification v0.9

Defines the core code, services, and design required in the system management bus PEIM to PEIM for the Intel® Platform Innovation Framework for EFI.

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Intel Platform Framework for EFI Specification Feedback

Give EFI specification feedback on the Intel® Platform Framework.

UEFI Boot Time Optimization: Intel, Microsoft, and Insyde

Overview of boot time, performance improvements, sample results, demo, why fast POST for Windows 7, other considerations for Windows 8

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