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Migration Solutions for Embedded Intel® Architecture

Klocwork analyzes source code and inspects codebase before Intel® architecture migration, minimizing cost, effort, and complexity. (v.1, Oct. 2011)

Basics of Building Intel® Architecture Design

White Paper: Describes elements of Intel® architecture design, including voltage regulators, clock sources, and power sequencing. (v.1, Sep. 2010)

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Debugging Processor Reorder Buffer Timeout: Guide

Guide: Describes processor reorder buffer timeout and provides methodology for debugging these types of system issues. (v.1, Oct. 2010)

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Real-Time Analytics: SAP HANA* Software and Intel® Technologies

See how the SAP HANA* platform, using the latest Intel® technologies, is providing real-time in-memory analytics for core business processes.

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Intel® 82576 SR-IOV Driver: Companion Guide

Comparison Guide: discusses SR-IOV portions of the Xen Physical Function driver and the Linux* Virtual Function driver. (v.1, Jun. 2009)

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Intel® Ethernet Controller I350 and Power Management Technology

White Paper: Describes Intel® Ethernet power management technology and DMA Coalescing with experiments, configuration info, and control methods.

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How to Implement a 64B PCIe* Burst Transfer on Intel® Architecture

White Paper: How to implement a 64B PCIe* burst transfer on Intel® architecture using cache attributes and fence instructions. (v.001, Feb. 2013)

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Intel® 3000 and 3010 Chipset Product Brief

Intel® Xeon® processor 3000 sequence, Intel® 3000 and 3010 Chipset, for organizations needing a first server or small HPC cluster.

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Intel® 3200 and 3210 Chipset Memory Controller Hub Spec Update

Specification Update, 2009: Intel® 5400 Express Chipset memory controller hub (MCH), clarifications, changes, and documentation errata.

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Intel® 5400 Chipset Memory Controller Hub: Spec Update

Specification Update, 2009: Intel® 5400 Express Chipset memory controller hub (MCH), clarifications, changes, and documentation errata.

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