Describes the signal description, system address map, MCH register description, DRAM controller registers, primary and secondary bridge registers, electrical characteristics and ballout, and package information for the Intel® 3200 and 3210 chipsets.
Specification Update, 2009: Intel® 5400 Express Chipset memory controller hub (MCH), clarifications, changes, and documentation errata.
Specification updates for the Intel® 3200 and Intel® 3210 Chipset Memory Controller Hub (MCH), including device and documentation errata, specification clarification, and changes.
Combines the performance of previous generation products with the power efficiencies of a low-power microarchitecture to enable smaller, quieter systems. These processors are 64-bit processors that maintain compatibility with IA-32 software.
Datasheet: describes configuration space registers and device-specific control and status registers for Intel® Xeon® processor 3400 series.
This document describes configuration space registers and device-specific control and status registers for Intel® Xeon® processor 3400 series.