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Intel® Itanium® Architecture Software Developer’s Manual Specification Update

Specification update: documentation errata, specification clarifications, changes to Intel® Itanium® Architecture Software Developer’s Manual.

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Intel® Itanium® Processor Software Specifications

Intel® Itanium® Processor Software Specifications

EFI Human Interface Infrastructure Specification v0.92

Defines core code for an implementation of the Human Interface Infrastructure of the Intel® Platform Innovation Framework for EFI.

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EFI System Management Mode Core Interface Spec (SMM CIS) v0.9

Defines the core code and services required for implementation of the System Management Mode of the Intel® Platform Innovation Framework for EFI.

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EFI Cache Subclass Specification v0.9

Defines core code for an implementation of the cache data hub subclass of the Intel® Platform Innovation Framework for EFI.

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EFI CPU I/O Protocol Specification v0.9

Covers core code and services required for an implementation of the CPU I/O Protocol of the Intel® Platform Innovation Framework for EFI.

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Intel® 7500 Scalable Memory Buffer Specification Update

This document contains updates to Intel® 7500 Scalable Memory Buffer. It is a compilation of device and documentation clarifications and changes.

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Intel® Itanium® Processor 9500 Series: Reference Manual

Software development and optimization guide for the Intel® Itanium® processor 9500 series with microarchitectural description and performance info.

EFI Human Interface Infrastructure Specification v0.91

Defines core code for implementation of Human Interface Infrastructure of the Intel® Platform Innovation Framework for EFI.

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EFI Status Codes Specification v0.92

Updated: Defines the basic components, status code classes, and status code architecture required for Intel® Platform Innovation Framework for EFI.

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