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Intel® Itanium® Processor Software Specifications

Intel® Itanium® Processor Software Specifications

Intel® 7500 Chipset

The Intel® 7500 chipset supports the 45 nm, high-k Intel® Xeon® processor 7500/6500 series and Intel® Itanium® processor 9300 series.

EFI Cache Subclass Specification v0.9

Defines core code for an implementation of the cache data hub subclass of the Intel® Platform Innovation Framework for EFI.

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EFI CPU I/O Protocol Specification v0.9

Covers core code and services required for an implementation of the CPU I/O Protocol of the Intel® Platform Innovation Framework for EFI.

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Intel® 7500 Scalable Memory Buffer Datasheet

Datasheet: Intel® 7500 Scalable Memory Buffer Datasheet.

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Intel® 7500 Chipset Datasheet

Datasheet: Intel® 7500 Chipset, describes common feature sets as well as feature differences between the platforms.

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Intel® 7500 Chipset Specification Update

Intel® 7500 chipset device and documentation errata, specification clarifications, and changes.

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Intel® 7500 Scalable Memory Buffer BSDL

Boundary-Scan Description Language (BSDL) File: Intel® 7500 Scalable Memory Buffer.

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Intel® 7500 Scalable Memory Buffer Specification Update

This document contains updates to Intel® 7500 Scalable Memory Buffer. It is a compilation of device and documentation clarifications and changes.

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Intel® 82801CA I/O Controller Hub 3-S: Datasheet

Datasheet for the Intel® 82801CA I/O Controller Hub 3-S covers PCI bus interface, integrated LAN and IDE controllers, power management, and more.

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