With the Intel® 5000V chipset for the Intel® Xeon® processor 5000 series can enable a system designer to offer faster time-to-solution.
With the Intel® 5000V Chipset and Intel® Xeon® processor 5000 series, system designers can offer faster time-to-solution.
Specification Update, 2009: Intel® 5000 series chipset Memory Controller Hub (MCH), clarifications, changes, and documentation errata.
Specification updates for the Intel® 5000 Series Chipset Memory Controller Hub (MCH), including device and documentation errata, specification clarification, and changes.
Thermal and Mechanical Design Guide: Intel® 631xESB and 632xESB I/O Controller Hub.
Discusses packaging technology, thermal specification, metrology, and solution for the Intel® 631xESB and 632xESB I/O Controller Hub.
Datasheet: Intel® 631xESB/ 632xESB I/O Controller Hub covers signal and functional descriptions, mechanical specifications, registers, and more.
This specification is intended for Original Equipment Manufacturers designing and building Intel® 631xESB/632xESB I/O Controller Hub-based products.
This document is a core specification for a Fully Buffered DIMM (FB DIMM, also FBD) memory system. Information critical to an Intel® 6400/6402 Advanced Memory Buffer (AMB) design appears in the other specifications, with specific cross-references.
Specification Update: Intel® 6400/6402 Advanced Memory Buffer covers document changes, errata, specification changes, and clarifications.
This document is a compilation of device and document errata and specification clarifications and changes, and is intended for hardware system manufacturers and for software developers of applications, operating systems, and tools.
Application Note: Interrupt swizzling solution for Intel® 5000 series chipset-based platforms.
Details the interrupt swizzling scheme and the programming and implementation requirements for the Intel® 5000 series chipset.